verilog inout

inout are actually "wire" so we can't use any procedural assignments. we need to use continuous

assignments.

inout a,b;
input wire enable;

wire a_out, b_out;
wire a_in, b_in;

//output assignment of inout port
assign a = (enable) ? a_out : 1'bz;
assign b = (enable) ? b_out : 1'bz;

//input assignment of inout port
assign a_in = (enable) ? a : 1'bz;
assign b_in = (enable) ? b : 1'bz;